Highly parallel GPU accelerator for HEVC transform and quantization

Scientific paper - Original scientific paper

• Author: Mate Čobrnić https://orcid.org/0000-0002-1422-0392
• Author: Alen Duspara
• Author: Leon Dragić
• Author: Igor Piljić https://orcid.org/0000-0003-2345-0322
• Author: Mario Kovač
• Editor: Su Ruidan
• Author's institution: University of Zagreb; Faculty of Electrical Engineering and Computing; (Department of Control and Computer Engineering)
• Scientific / art field, discipline and subdiscipline: TECHNICAL SCIENCES; Computing; Architecture of Computer Systems

Abstract (english)

When analysing Internet traffic today it can be found that digital video content prevails. Its domination will continue to
grow in the upcoming years and reach 82% of all traffic by 2021. If converted to Internet video minutes per second, this
equals about one million video minutes per second. Providing and supporting improved compression capability is therefore
expected from video processing devices. This will relieve the pressure on storage systems and communication networks
while... More creating preconditions for further development of video services. Transform and quantization is one of the most
compute-intensive parts of modern hybrid video coding systems where coding algorithm itself is commonly standardized.
High Efficiency Video Coding (HEVC) is state-of-the-art video coding standard which achieves high compression
efficiency at the cost of high computational complexity. In this paper we present highly parallel GPU accelerator for HEVC
transform and quantization which targets most common heterogeneous computing CPU+GPU system. The accelerator is
implemented using CUDA programming model. All the relevant state-of-the-art techniques related to kernel vectorization,
shared memory optimization and overlapping data transfers with computation were investigated, customized and carefully
combined to obtain a performance efficient solution across all applicable transform sizes. The proposed solution is
compared against reference implementation which uses NVIDIA cuBLAS library to perform the same work. Obtained
speedup factors for DCI 4K frame are 2.46 times for largest transform size and 130.17 times for smallest transform size
what revealed substantial performance gap of this library when targeting GPU of the Kepler architecture. Achieved
processing time of frame transform and quantization are up to 4.82 ms. Less

• Keywords (english): Integer discrete cosine transform (DCT), high efficiency video coding (HEVC), graphics processor unit (GPU), matrix multiplication, compute unified device architecture (CUDA), high performance computing (HPC)
• Language: english
• Publication type: Scientific paper - Original scientific paper
• Publication status: Published
• Peer review: Peer review - international
• Publication version: Published version
• Publication title: Proc. SPIE 11584, 2020 International Conference on Image, Video Processing and Artificial Intelligence
• Numbering: vol. 11584, pp. 81-86
• ISBN: 9781510639973
• e-ISSN: 1996-756X
• DOI: https://doi.org/10.1117/12.2581228
• URN:NBN: urn:nbn:hr:168:263496
• Publication: 2020-11-10
• Project: Number: 761349; Title (croatian): TEchnology TRAnsfer via Multinational Application eXperiments; Acronym: TETRAMAX; Jurisdiction: eu; Funding stream: H2020
• Conference: Title: Third International Conference on Image, Video Processing and Artificial Intelligence, 2020, Shanghai, China; Location: Shangai, China; Organizer: Shanghai Advanced Research Institute, Chinese Academy of Sciences; Start date: 2020-08-21; End date: 2020-08-23; Assembly type: Lecture
• Document URL: https://www.spiedigitallibrary.org/conference-proceedings-of-spie/11584/2581228/Highly-parallel-GPU-accelerator-for-HEVC-transform-and-quantization/10.1117/12.2581228.short
• Type of resource: Text
• Publisher: SPIE
• Publishing place: Washington, USA
• Access conditions: Open access
• Public note: The work in this paper was partially financed by the MEEP project that has received funding from the European High- Performance Computing Joint Undertaking (JU) under grant agreement No 946002 and by the TETRAMAX project that has received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreement number 761349.
• Created on: 2020-12-08 08:36:28