Sklopovsko ubrzanje enkripcijskog algoritma FNR

master's thesis

• Title (english): Hardware acceleration of FNR algorithms
• Author: Krunoslav Vukmanić
• Mentor: Hrvoje Mlinarić (mentor)
• Committee member: Hrvoje Mlinarić (predsjednik povjerenstva)
• Committee member: Josip Knezović (član povjerenstva)
• Committee member: Daniel Hofman (član povjerenstva)
• Granter: University of Zagreb; Faculty of Electrical Engineering and Computing; Zagreb
• Defense date and country: 2019-09-18, Croatia
• Scientific / art field, discipline and subdiscipline: TECHNICAL SCIENCES; Computing

Abstract

Razvojno okruženje SDSoC omogućuje relativno jednostavno ubrzanje različitih aplikacija tako da se dijelovi programa izvršavaju izravno unutar programabilne logike ciljnog sustava. Algoritam FNR je veoma dobar kandidat za sklopovsko ubrzanje zbog načina rada gdje se obrađuju blokovi podataka fiksne veličine bez promjene formata. Okruženje SDSoC, osim alata za transformaciju aplikacije da radi direktno na sklopovlju, omogućuje i direktno profiliranje aplikacije što znači da nema potrebe za korištenjem ikakvog dodatnog razvojnog okruženja. Idealni kandidat za ubrzanje u algoritmu FNR je funkcija koja obavlja parno nezavisne permutacije i na nju se troši preko polovica vremena izvođenja funkcija za enkripciju i dekripciju.

Abstract (english)

The SDSoC IDE allows us relatively simple acceleration of different applications in a way where certain parts of our program are being executed directly inside the PL of our FPGA platform. The FNR algorithm is an ideal candidate for hardware acceleration cause of the way it works. It operates on fixed size blocks of data without changing the format of the block. On top of having the tools to transform our application to work directly on the hardware, the SDSoC IDE can directly profile our application which means that there is no need to use any additional tools. The ideal candidate for acceleration in the FNR algorithm is the function that does the pair-wise independent permutations and more than half of the runtime of the encryption and decryption functions is spent inside that function.

• Keywords: Fleksibilni Naor i Reingold; SDSoC; hardversko ubrzanje; optimizacija
• Keywords (english): Flexible Naor and Reingold; SDSoC; hardware acceleration; optimization
• Language: croatian
• URN:NBN: urn:nbn:hr:168:630539
• Study programme: Title: Computing; Study programme type: university; Study level: graduate; Academic / professional title: magistar/magistra inženjer/inženjerka računarstva (magistar/magistra inženjer/inženjerka računarstva)
• Type of resource: Text
• File origin: Born digital
• Access conditions: Closed access
• Created on: 2020-01-07 23:03:24