Analiza vertikalnog MOS tranzistora u tehnologiji silicij ni na čemu

scientific master's theses

• Author: Mario Perić
• Mentor: Petar Biljanović (mentor)
• Committee member: Julijana Divković-Pukšec (predsjednik povjerenstva)
• Committee member: Petar Biljanović (član povjerenstva)
• Committee member: Božidar Vojnović (član povjerenstva)
• Granter: University of Zagreb; Faculty of Electrical Engineering and Computing; (Department of Electronics, Microelectronics, Computer and Intelligent Systems); Zagreb
• Defense date and country: 2006, Croatia
• Scientific / art field, discipline and subdiscipline: TECHNICAL SCIENCES; Electrical Engineering; Electronics
• Universal decimal classification (UDC): 621.3 - Electrical engineering

Abstract

U radu je prikazan kratki opis tehnologije silicija na izolatoru, prednosti te strukture i problemi prilikom skaliranja. Ta struktura zajedno sa strukturom silicija ni na čemu poslužiti će nam u razumijevanju strukture vertikalnog MOS tranzistora u tehnologiji silicija ni na čemu. Prikazati ćemo različite tehnološke izvedbe te strukture, optimizirati geometrijske i topološke dimenzije. Pomoću dvodimenzionalnog 2D simulatora MEDICI izvršena analizu je i povezanost tehnološke parametre i karakteristike SONFET-a te modeliranje i ekstrakcija električkih parametara.

Abstract (english)

Short overview of technology silicon on insulator and his advantages and problems with scaling is given. This transistor together with silicon on nothing MOS transistor will help as to understand vertical silicon on nothing MOS transistor. We will show different realization of vertical silicon on nothing transistors it will be optimize geometric and topologic dimension. With two-dimensional 2D electrical simulator MEDICI we will analyze and connect technologic parameter and characteristics of SONFET. It will be modeling SONFET and extraction of electrical parameters.

• Keywords: silicij ni na čemu SON; silicij na izolatoru SOI; napon praga; ukopani oksidni sloj; kratki kanal; uski kanal; skaliranje
• Keywords (english): silicon on nothing SON; silicon on insulator SOI; threshold voltage; buried oxide layer BOX; short channel; narrow channel; scaling
• Language: croatian
• URN:NBN: urn:nbn:hr:168:290007
• Study programme: Title: Postgraduate master programme in electrical engineering; Study programme type: university; Study level: postgraduate; Academic / professional title: Magistar znanosti elektrotehnike (Magistar znanosti elektrotehnike)
• Type of resource: Text
• File origin: Born digital
• Access conditions: Closed access
• Created on: 2019-07-01 06:45:08