Dizajn i FPGA implementacija izoštrenih CIC filtara sa zadanim brojem zbrajala

master's thesis

• Title (english): Design and FPGA Implementation of Sharpened CIC Filters With Specified Number of Adders
• Author: Mislav Šalković
• Mentor: Mladen Vučić (mentor)
• Committee member: Mladen Vučić (predsjednik povjerenstva)
• Committee member: Davor Petrinović (član povjerenstva)
• Committee member: Goran Molnar (član povjerenstva)
• Granter: University of Zagreb; Faculty of Electrical Engineering and Computing; Zagreb
• Defense date and country: 2018-09-28, Croatia
• Scientific / art field, discipline and subdiscipline: TECHNICAL SCIENCES; Electrical Engineering

Abstract

U ovom diplomskom radu bavili smo se postupcima dizajna i realizacije polinomno izoštrenih CIC filtara. U razvojnom okruženju MATLAB napravljeni su izračuni polinomijalnih koeficijenata zapisanih kao potencije broja dva korištenjem minimax dizajna za CIC filtar u pojasu preklapanja spektara. S izračunatim koeficijentima razvili smo RTL model izoštrenog CIC filtra koristeći jezik za opis sklopovlja VHDL. Model je optimiziran za implementaciju na programabilnim logičkim poljima (FPGA) te je za isti napravljeno ispitno okruženje, provedena je simulacija te je model uhodan na stvarnom sklopovlju.

Abstract (english)

In this master’s thesis we have been learning about design a realisation of polynomial sharpened CIC filters. In MATLAB desktop environment, a tool has been designed in the purpose of calculating polynomial coefficients in the form of powers of two by using the minimax method for the CIC folding bands. With the calculated polynomials we have developed a physically achievable model of the CIC filter using the program language VHDL. The model is optimised for implementation on FPGA systems. Finally, a testbench has been made for the model and with all simulations run and checked, the model has been transferred to a real development board.

• Keywords: CIC filtar; polinomno izoštravanje; suma potencija broja dva; struktura bez množila; optimizacija; iscrpno pretraživanje; RTL model; programabilna logička polja; FPGA
• Keywords (english): CIC filter; polynomial sharpening; sum of powers of two; multiplierless structure; optimization; exhaustive search; RTL model; field programmable gate arrays; FPGA
• Language: croatian
• URN:NBN: urn:nbn:hr:168:934426
• Study programme: Title: Electrical Engineering and Information Technology; Study programme type: university; Study level: graduate; Academic / professional title: magistar/magistra inženjer/inženjerka elektrotehnike i informacijske tehnologije (magistar/magistra inženjer/inženjerka elektrotehnike i informacijske tehnologije)
• Type of resource: Text
• File origin: Born digital
• Access conditions: Closed access
• Created on: 2019-03-14 01:04:56