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undergraduate thesis
Implementacija napada na neuronsku mrežu analizom napajanja FPGA sklopa

Galić, Mirko
University of Zagreb
Faculty of Electrical Engineering and Computing

Cite this document

Galić, M. (2020). Implementacija napada na neuronsku mrežu analizom napajanja FPGA sklopa (Undergraduate thesis). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:317414

Galić, Mirko. "Implementacija napada na neuronsku mrežu analizom napajanja FPGA sklopa." Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2020. https://urn.nsk.hr/urn:nbn:hr:168:317414

Galić, Mirko. "Implementacija napada na neuronsku mrežu analizom napajanja FPGA sklopa." Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2020. https://urn.nsk.hr/urn:nbn:hr:168:317414

Galić, M. (2020). 'Implementacija napada na neuronsku mrežu analizom napajanja FPGA sklopa', Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 17 June 2024, https://urn.nsk.hr/urn:nbn:hr:168:317414

Galić M. Implementacija napada na neuronsku mrežu analizom napajanja FPGA sklopa [Undergraduate thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2020 [cited 2024 June 17] Available at: https://urn.nsk.hr/urn:nbn:hr:168:317414

M. Galić, "Implementacija napada na neuronsku mrežu analizom napajanja FPGA sklopa", Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2020. Available at: https://urn.nsk.hr/urn:nbn:hr:168:317414

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