Karakteristike VLSI prospojnih mreža

scientific master's theses

• Title (english): VLSI Interconnect Characteristics
• Author: Vladimir Jovanović
• Mentor: Petar Biljanović (mentor)
• Committee member: Zijad Haznadar (predsjednik povjerenstva)
• Committee member: Petar Biljanović (član povjerenstva)
• Committee member: Božidar Vojnović (član povjerenstva)
• Granter: University of Zagreb; Faculty of Electrical Engineering and Computing; (Department of Electronics, Microelectronics, Computer and Intelligent Systems); Zagreb
• Defense date and country: 2004, Croatia
• Scientific / art field, discipline and subdiscipline: TECHNICAL SCIENCES; Electrical Engineering; Electronics
• Universal decimal classification (UDC): 621.3; APPLIED SCIENCES. MEDICINE. TECHNOLOGY; Electrical engineering

Abstract

Razvojem poluvodičke tehnologije VLSI sklopovi imaju sve veće dimenzije, a sastavljeni su od sve manjih elemenata – tranzistora. Zbog toga prospojne mreže postaju složenije uz zahtjeve za bržim prijenosom signala. Modeliranje prospojnih mreža dobiva na značenju, a za opis se obično koriste otpori, kapaciteti i induktiviteti. U radu su opisani utjecaji i značaj svakog od ova tri elementa, a polazeći od Maxwellovih jednadžbi izvedeni su definicijski izrazi od kojih počinju metode njihove ekstrakcije. Budući da ekstrakcija kapaciteta i induktiviteta predstavlja složen postupak, opisan je veći broj metoda za ekstrakciju i ubrzanje ekstrakcije. Izloženi su problemi koji postoje u modeliranju induktivnih pojava. Iz poznatih vrijednosti elemenata modela prospojne mreže, mogu se izvesti analitički izrazi za kašnjenje signala. Prezentirani su izrazi za Elmoreovo kašnjenje i kašnjenje na prijenosnim linijama sa RC i RLC modelima. Dane su vrijednosti kašnjenja i preslušavanja za kratke vodove, vodove srednje duljine i dugačke vodove. Na osnovu karakteristika prospojnih vodova izvedena su pravila za njihovo projektiranje. Izvršena je simulacija 8-bitne sabirnice kao primjera na kojem se mogu ispitati karakteristike prospojnih vodova. Rezultati simulacije potvrđuju predviđanja iz prethodnih poglavlja. U dodatku A dane su karakteristike materijala za izradu prospojnih vodova, a u dodatku B opisani su tehnološki procesi za njihovo dobivanje.

Abstract (english)

With the development of the semiconductor technology, the VLSI circuits are becoming larger and are composed of ever smaller elements – transistors. Because of this, the interconnections are becoming more complex while the speed demands are higher. The modelling of the interconnect is gaining importance and it is usually modelled using resistances, capacitances, and inductances. In this thesis, the influence and importance of each element is given. Starting from Maxwell's equations the defining relations for the extraction methods are derived. Because of the complexity of the capacitance and inductance extraction, a number of extraction methods and methods for increasing the speed of the extraction are presented. The inductance modelling problems are described. From the known values of the interconnect model elements, relations for the signal delay can be derived. The formulae for the Elmore delay and the transmission line delay for RC and RLC models are presented. Propagation delay and crosstalk for short, medium, and long wires are given. Based on the interconnect characteristics, some design rules are derived. The 8-bit data bus was simulated as an example on which the interconnect characteristics can be examined. The simulation results confirm the predictions presented in previous chapters. The characteristics of the materials used for interconnect manufacturing are given in appendix A and the technological processes are presented in appendix B.

• Keywords: integrirani sklopovi; VLSI; prospojne mreže; otpor; kapacitet; induktivitet; ekstrakcija; kašnjenje; preslušavanje
• Keywords (english): integrated circuits; VLSI; interconnect; resistance; capacitance; inductance; extraction; delay; crosstalk
• Language: croatian
• URN:NBN: urn:nbn:hr:168:999168
• Study programme: Title: Postgraduate master programme in electrical engineering; Study programme type: university; Study level: postgraduate; Academic / professional title: Magistar znanosti elektrotehnike (Magistar znanosti elektrotehnike)
• Catalog URL: https://lib.fer.hr:8443/cgi-bin/koha/catalogue/detail.pl?biblionumber=29280
• Type of resource: Text
• Extent: VI ; 84 str.
• File origin: Born digital
• Access conditions: Closed access
• Created on: 2019-11-27 10:26:00