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master's thesis
FPGA implementacija filtara s varijabilnim kašnjenjem temeljena na Farrow strukturi

Benc, Antonio (2016)
University of Zagreb
Faculty of Electrical Engineering and Computing

Cite this document

Benc, A. (2016). FPGA implementacija filtara s varijabilnim kašnjenjem temeljena na Farrow strukturi (Master's thesis). Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:710701

Benc, Antonio. "FPGA implementacija filtara s varijabilnim kašnjenjem temeljena na Farrow strukturi." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2016. https://urn.nsk.hr/urn:nbn:hr:168:710701

Benc, Antonio. "FPGA implementacija filtara s varijabilnim kašnjenjem temeljena na Farrow strukturi." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2016. https://urn.nsk.hr/urn:nbn:hr:168:710701

Benc, A. (2016). 'FPGA implementacija filtara s varijabilnim kašnjenjem temeljena na Farrow strukturi', Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 08 August 2020, https://urn.nsk.hr/urn:nbn:hr:168:710701

Benc A. FPGA implementacija filtara s varijabilnim kašnjenjem temeljena na Farrow strukturi [Master's thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2016 [cited 2020 August 08] Available at: https://urn.nsk.hr/urn:nbn:hr:168:710701

A. Benc, "FPGA implementacija filtara s varijabilnim kašnjenjem temeljena na Farrow strukturi", Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2016. Available at: https://urn.nsk.hr/urn:nbn:hr:168:710701

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