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undergraduate thesis
Implementation of software defined receiver on Spartan 6 FPGA devices

Dominik Barbarić (2015)
University of Zagreb
Faculty of Electrical Engineering and Computing
Cite this document...

Barbarić, D. (2015). Implementacija programski definiranog prijamnika na FPGA sklopovima familije Spartan 6 (Undergraduate thesis). Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:338484

Barbarić, Dominik. "Implementacija programski definiranog prijamnika na FPGA sklopovima familije Spartan 6." Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2015. https://urn.nsk.hr/urn:nbn:hr:168:338484

Barbarić, Dominik. "Implementacija programski definiranog prijamnika na FPGA sklopovima familije Spartan 6." Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2015. https://urn.nsk.hr/urn:nbn:hr:168:338484

Barbarić, D. (2015). 'Implementacija programski definiranog prijamnika na FPGA sklopovima familije Spartan 6', Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 24 August 2019, https://urn.nsk.hr/urn:nbn:hr:168:338484

Barbarić D. Implementacija programski definiranog prijamnika na FPGA sklopovima familije Spartan 6 [Undergraduate thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2015 [cited 2019 August 24] Available at: https://urn.nsk.hr/urn:nbn:hr:168:338484

D. Barbarić, "Implementacija programski definiranog prijamnika na FPGA sklopovima familije Spartan 6", Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2015. Available at: https://urn.nsk.hr/urn:nbn:hr:168:338484