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master's thesis
Design and FPGA Implementation of Sharpened CIC Filters With Specified Number of Adders

Mislav Šalković (2018)
University of Zagreb
Faculty of Electrical Engineering and Computing
Cite this document...

Šalković, M. (2018). Dizajn i FPGA implementacija izoštrenih CIC filtara sa zadanim brojem zbrajala (Master's thesis). Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:934426

Šalković, Mislav. "Dizajn i FPGA implementacija izoštrenih CIC filtara sa zadanim brojem zbrajala." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2018. https://urn.nsk.hr/urn:nbn:hr:168:934426

Šalković, Mislav. "Dizajn i FPGA implementacija izoštrenih CIC filtara sa zadanim brojem zbrajala." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2018. https://urn.nsk.hr/urn:nbn:hr:168:934426

Šalković, M. (2018). 'Dizajn i FPGA implementacija izoštrenih CIC filtara sa zadanim brojem zbrajala', Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 15 September 2019, https://urn.nsk.hr/urn:nbn:hr:168:934426

Šalković M. Dizajn i FPGA implementacija izoštrenih CIC filtara sa zadanim brojem zbrajala [Master's thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2018 [cited 2019 September 15] Available at: https://urn.nsk.hr/urn:nbn:hr:168:934426

M. Šalković, "Dizajn i FPGA implementacija izoštrenih CIC filtara sa zadanim brojem zbrajala", Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2018. Available at: https://urn.nsk.hr/urn:nbn:hr:168:934426