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master's thesis
FPGA Implementation of Multiplierless Digital Down Converter

Ivan Laznibat (2017)
University of Zagreb
Faculty of Electrical Engineering and Computing
Cite this document...

Laznibat, I. (2017). FPGA implementacija digitalnog pretvarača frekvencije bez upotrebe množila (Master's thesis). Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:076939

Laznibat, Ivan. "FPGA implementacija digitalnog pretvarača frekvencije bez upotrebe množila." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2017. https://urn.nsk.hr/urn:nbn:hr:168:076939

Laznibat, Ivan. "FPGA implementacija digitalnog pretvarača frekvencije bez upotrebe množila." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2017. https://urn.nsk.hr/urn:nbn:hr:168:076939

Laznibat, I. (2017). 'FPGA implementacija digitalnog pretvarača frekvencije bez upotrebe množila', Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 19 April 2019, https://urn.nsk.hr/urn:nbn:hr:168:076939

Laznibat I. FPGA implementacija digitalnog pretvarača frekvencije bez upotrebe množila [Master's thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2017 [cited 2019 April 19] Available at: https://urn.nsk.hr/urn:nbn:hr:168:076939

I. Laznibat, "FPGA implementacija digitalnog pretvarača frekvencije bez upotrebe množila", Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2017. Available at: https://urn.nsk.hr/urn:nbn:hr:168:076939