Projektiranje referentnog naponskog izvora u standardnoj CMOS tehnologiji

undergraduate thesis

• Title (english): Design of the bandgap voltage reference in standard CMOS process
• Author: Martin Berić
• Mentor: Marko Koričić (mentor)
• Committee member: Marko Koričić (predsjednik povjerenstva)
• Committee member: Josip Žilak (član povjerenstva)
• Committee member: Tihomir Knežević (član povjerenstva)
• Granter: University of Zagreb; Faculty of Electrical Engineering and Computing; Zagreb
• Defense date and country: 2017-07-10, Croatia
• Scientific / art field, discipline and subdiscipline: TECHNICAL SCIENCES; Computing
• Scientific / art field, discipline and subdiscipline: TECHNICAL SCIENCES; Electrical Engineering

Abstract

Projektiran je referentni naponski izvor korištenjem standardnog CMOS procesa.
Korišteni su osnovni sklopovi kojima smo dodali otpornike u jednoj verziji i
kaskodni spoj unipolarnih tranzistora u drugoj verziji kako bismo smanjili utjecaje
varijacije napona napajanja i utjecaje neusklađenosti karakteristika tranzistora.
Optimirali smo sklopove s obzirom na potrošnju snage te fizičku veličinu
komponenata odnosno površinu koju sklop zauzima. Analiziran je temperaturni
koeficijent referentnog napona u temperaturnom proširenom rasponu za
industrijske aplikacije. Ispitan je utjecaj napona napajanja na vrijednost
referentnog napona. Analiziran je utjecaj varijacije procesa na rad sklopa
korištenjem Montecarlo simulacija u programskom paketu Cadence. Napravljena
je statistička analiza utjecaja neusklađenosti karakteristika tranzistora na iznos i
temperaturni koeficijent referentnog napona u zadanom temperaturnom području.

Abstract (english)

Bandgap voltage references using standard CMOS process are
designed. Basic bandgap reference is designed along with two improved versions.
One version uses the resistors in order to reduce overdrive voltages which results
in a better mismatch properties. The other version uses cascode current mirrors in
order to improve immunity to power supply variations. We optimized device for
power consumption and circuit area on chip. Circuits are analyzed through
temperature coefficient and value of reference voltage in temperature range for
extended industrial applications. Influence of voltage supply variation on the
electrical performance is analyzed as well. Montecarlo analysis in Cadence is used
to investigate the influence of process variations. Statistical analysis of transistor
mismatch and its impact on reference voltage and temperature coefficient is done in specified temperature range.

• Keywords: bandgap; CMOS; strujna zrcala; kaskoda; PMOS; NMOS; PTAT
• Keywords (english): bandgap; CMOS; current mirrors; cascode; PMOS; NMOS; PTAT
• Language: croatian
• URN:NBN: urn:nbn:hr:168:316445
• Study programme: Title: Electrical Engineering and Information Technology; Study programme type: university; Study level: undergraduate; Academic / professional title: sveučilišni/a prvostupnik/ prvostupnica (baccalaureus/baccalaurea) inženjer/inženjerka elektrotehnike i informacijske tehnologije (sveučilišni/a prvostupnik/ prvostupnica (baccalaureus/baccalaurea) inženjer/inženjerka elektrotehnike i informacijske tehnologije)
• Type of resource: Text
• File origin: Born digital
• Access conditions: Closed access
• Created on: 2019-03-13 19:02:15