Optimizacija mreže napajanja za mikroprocesor namijenjen korištenju u automobilskoj industriji

master's thesis

• Title (english): Optimization of power distribution network for microprocessor in automotive applications
• Author: Krešimir Šolaja
• Mentor: Adrijan Barić (mentor)
• Committee member: Adrijan Barić (predsjednik povjerenstva)
• Committee member: Tomislav Marković (član povjerenstva)
• Committee member: Tvrtko Mandić (član povjerenstva)
• Granter: University of Zagreb; Faculty of Electrical Engineering and Computing; Zagreb
• Defense date and country: 2023-07-07, Croatia

Abstract

U ovom diplomskom radu su prikazani i objašnjeni osnovni dijelovi mreže napajanja, njihov doprinos u frekvencijskoj i vremenskoj domeni te ciljana impedancija. Objašnjeni su simulatori namijenjeni za analizu mreža napajanja, ogranicenja u optimizaciji i kako modelirati naponski regulator i teret u simulacijama. Predložene su metode validacije rezultata simulacija. Analiziran je vod napajanja 0,8 V, koji napaja jezgru mikroprocesora, u frekvencijskoj i vremenskoj domeni. U frekvencijskoj domeni se impedancijski profil mreže napajanja usporedivao s ciljanom impedancijom. Izvršene su vremenske analize razlicitih kombinacija kondenzatora i prikazana je metoda smanjenja nadvišenja struje naponskog regulatora. Prikazana je metoda analize mreže napajanja u vremenskoj domeni izlaznom strujom frekvencije na kojoj se nalazi najviša antirezonancija u impedancijskom profilu. Na kraju je dan prijedlog promjene početnog dizanja mreže napajanja.

Abstract (english)

In this diploma thesis, the basic parts of the power supply network, their contribution in the frequency and time domain, and the target impedance are presented and explained. Simulators intended for the analysis of power distribution networks, optimization constraints and how to model the voltage regulator and load in simulations are explained. Validation methods of simulation results are proposed. The 0.8 V power supply line that supplies the microprocessor core is analyzed in the frequency and time domain. In the frequency domain, the impedance profile of the supply network was compared with the target impedance. Time analyzes of different combinations of capacitors were performed and a method of reducing the overshoot of the voltage regulator current was presented. The method of analyzing the power supply network in the time domain with the output current of the frequency at which the highest anti-resonance in the impedance profile is found is presented. At the end, a proposal was given to change the initial version of the power distribution network.

• Keywords: ciljana impedancija; frekvencijski pojas; valovitost napona; elektromagnetski simulator; naponski regulator
• Keywords (english): Target impedance; bandwidth; voltage ripple; electromagnetic simulator; voltage regulator module
• Language: croatian
• URN:NBN: urn:nbn:hr:168:666754
• Study programme: Title: Electrical Engineering and Information Technology; Study programme type: university; Study level: graduate; Academic / professional title: magistar/magistra inženjer/inženjerka elektrotehnike i informacijske tehnologije (magistar/magistra inženjer/inženjerka elektrotehnike i informacijske tehnologije)
• Type of resource: Text
• File origin: Born digital
• Access conditions: Closed access
• Created on: 2025-02-25 13:38:30