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master's thesis
FPGA implementacija analize vremenskih serija metodama dubokog učenja

Sever, Matija
University of Zagreb
Faculty of Electrical Engineering and Computing

Cite this document

Sever, M. (2024). FPGA implementacija analize vremenskih serija metodama dubokog učenja (Master's thesis). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:415521

Sever, Matija. "FPGA implementacija analize vremenskih serija metodama dubokog učenja." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2024. https://urn.nsk.hr/urn:nbn:hr:168:415521

Sever, Matija. "FPGA implementacija analize vremenskih serija metodama dubokog učenja." Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2024. https://urn.nsk.hr/urn:nbn:hr:168:415521

Sever, M. (2024). 'FPGA implementacija analize vremenskih serija metodama dubokog učenja', Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 26 February 2025, https://urn.nsk.hr/urn:nbn:hr:168:415521

Sever M. FPGA implementacija analize vremenskih serija metodama dubokog učenja [Master's thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2024 [cited 2025 February 26] Available at: https://urn.nsk.hr/urn:nbn:hr:168:415521

M. Sever, "FPGA implementacija analize vremenskih serija metodama dubokog učenja", Master's thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2024. Available at: https://urn.nsk.hr/urn:nbn:hr:168:415521

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