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undergraduate thesis
Izvedba sustava sa FRISC-V procesorom
2024. urn:nbn:hr:168:999425
Kokić, Luka
University of Zagreb
Faculty of Electrical Engineering and Computing

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Kokić, L. (2024). Izvedba sustava sa FRISC-V procesorom (Undergraduate thesis). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:999425

Kokić, Luka. "Izvedba sustava sa FRISC-V procesorom." Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2024. https://urn.nsk.hr/urn:nbn:hr:168:999425

Kokić, Luka. "Izvedba sustava sa FRISC-V procesorom." Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2024. https://urn.nsk.hr/urn:nbn:hr:168:999425

Kokić, L. (2024). 'Izvedba sustava sa FRISC-V procesorom', Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 23 April 2025, https://urn.nsk.hr/urn:nbn:hr:168:999425

Kokić L. Izvedba sustava sa FRISC-V procesorom [Undergraduate thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2024 [cited 2025 April 23] Available at: https://urn.nsk.hr/urn:nbn:hr:168:999425

L. Kokić, "Izvedba sustava sa FRISC-V procesorom", Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2024. Available at: https://urn.nsk.hr/urn:nbn:hr:168:999425

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Metadata
TitleIzvedba sustava sa FRISC-V procesorom
Title (english)Implementation of FRISC-V processor system
AuthorLuka Kokić
MentorMario Kovač (mentor)
Committee memberMario Kovač (član povjerenstva)
Committee memberHana Ivandić (član povjerenstva)
Committee memberAna Šikić (član povjerenstva)
GranterUniversity of Zagreb
Faculty of Electrical Engineering and Computing
Zagreb
Defense date and country2024-06-27, Croatia
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Computing
Abstract
Za ovaj završni rad testirana je FRISC-V procesorska jezgra. Funkcijska simulacija je napravljena koristeći Vivado simulator, a provjera da jezgra radi kada je isprogramirana na PYNQ-Z2 pločici je odrađena s pomoću dvije aplikacije koje komuniciraju serijskom vezom, jedna na strani PC-a koja je napisana u Pythonu te druga na strani ARM-a napisana u C-u. Nakon dugotrajnog ispitivanja FRISC-V jezgra je uspješno izvodila pripremljene programe.
Abstract (english)
In this thesis the FRISC-V processor core was tested. Behavioral simulation was done using the Vivado simulator and the check that the processor core works when programmed on the PYNQ-Z2 board was done using two applications that communicate using serial communication. On the PC side the application was written in Python and on the ARM side in C. After much testing the FRISC-V proccessor core succesfully executed prepared programs.
Keywords
Keywords (english)
Languagecroatian
URN:NBNurn:nbn:hr:168:999425
Study programmeTitle: Computing
Study programme type: university
Study level: undergraduate
Academic / professional title: sveučilišni/a prvostupnik/ prvostupnica (baccalaureus/baccalaurea) inženjer/inženjerka računarstva (sveučilišni/a prvostupnik/ prvostupnica (baccalaureus/baccalaurea) inženjer/inženjerka računarstva)
Type of resourceText
File originBorn digital
Access conditionsOpen access
Terms of useLicence In copyright icon
Public note
Created on2024-10-12 21:05:00
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