prikaz prve stranice dokumenta Diskretne kosinusne transformacije za JPEG dekoder na RISC-V procesoru
No public access
undergraduate thesis
Diskretne kosinusne transformacije za JPEG dekoder na RISC-V procesoru
2023. urn:nbn:hr:168:607659
Tomljenović, Fran
University of Zagreb
Faculty of Electrical Engineering and Computing

Cite this document

Tomljenović, F. (2023). Diskretne kosinusne transformacije za JPEG dekoder na RISC-V procesoru (Undergraduate thesis). Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing. Retrieved from https://urn.nsk.hr/urn:nbn:hr:168:607659

Tomljenović, Fran. "Diskretne kosinusne transformacije za JPEG dekoder na RISC-V procesoru." Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2023. https://urn.nsk.hr/urn:nbn:hr:168:607659

Tomljenović, Fran. "Diskretne kosinusne transformacije za JPEG dekoder na RISC-V procesoru." Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, 2023. https://urn.nsk.hr/urn:nbn:hr:168:607659

Tomljenović, F. (2023). 'Diskretne kosinusne transformacije za JPEG dekoder na RISC-V procesoru', Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, accessed 10 July 2024, https://urn.nsk.hr/urn:nbn:hr:168:607659

Tomljenović F. Diskretne kosinusne transformacije za JPEG dekoder na RISC-V procesoru [Undergraduate thesis]. Zagreb: University of Zagreb, Faculty of Electrical Engineering and Computing; 2023 [cited 2024 July 10] Available at: https://urn.nsk.hr/urn:nbn:hr:168:607659

F. Tomljenović, "Diskretne kosinusne transformacije za JPEG dekoder na RISC-V procesoru", Undergraduate thesis, University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, 2023. Available at: https://urn.nsk.hr/urn:nbn:hr:168:607659

Please login to the repository to save this object to your list.
Metadata
TitleDiskretne kosinusne transformacije za JPEG dekoder na RISC-V procesoru
Title (english)Discrete cosine transformations for JPEG decoder on RISC-V processor
AuthorFran Tomljenović
MentorDaniel Hofman (mentor)
Committee memberDaniel Hofman (član povjerenstva)
Committee memberJakov Benjak (član povjerenstva)
Committee memberHana Ivandić (član povjerenstva)
GranterUniversity of Zagreb
Faculty of Electrical Engineering and Computing
Zagreb
Defense date and country2023-06-28, Croatia
Scientific / art field,
discipline and subdiscipline		TECHNICAL SCIENCES
Computing
Abstract
JPEG format za kompresiju slika vrlo je raširen. U ovom radu opisuje se postupak koji je potrebno provesti kako bi se asemblerski kôd generiran GCC kompajlerom iz funkcije za inverznu diskretnu kosinusnu transformaciju biblioteke Jaguar mogao izvesti na SSPARCSS simulatoru za RISC-V arhitekturu.
Abstract (english)
JPEG format used for image compression is widely used. This thesis describes steps needed to generate valid assembly code using GCC compiler from IDCT function extracted from Jaguar library so it can be simulated using SSPARCSS simulator targeting RISC-V architecture.
Keywords
Keywords (english)
Languagecroatian
URN:NBNurn:nbn:hr:168:607659
Study programmeTitle: Computing
Study programme type: university
Study level: undergraduate
Academic / professional title: sveučilišni/a prvostupnik/ prvostupnica (baccalaureus/baccalaurea) inženjer/inženjerka računarstva (sveučilišni/a prvostupnik/ prvostupnica (baccalaureus/baccalaurea) inženjer/inženjerka računarstva)
Type of resourceText
File originBorn digital
Access conditionsClosed access
Terms of useLicence In copyright icon
Public note
Created on2024-03-28 07:42:14